ARCH-AVR requirements¶
The AVR port shall declare 8-bit words, 16-bit pointers, byte stack alignment, a 37-byte context frame, no nesting, no zero-latency class, no compare-and-swap, no interrupt stack, no protection, no fault entry, and tickless limited to idle modes; the tiny defaults (table scheduler, 32-bit time, 8-bit notifications, no system work queue, no idle thread) shall be mandatory on it. Rationale: SPEC-012 §2; ADR-036. Status: Accepted 2026-10-07 Verification: Manifest schema check; configuration test refusing the isolated profile on AVR. Trace: SPEC-012 §2 |
The thread-context switch, the interrupt epilogue switch, and the initial frame shall use the single 35-byte frame layout (37-byte call/context reserve) of SPEC-012 §4.1 (return address, Rationale: One switch path (PORT-004) and the cheapest possible P1 on a core without an interrupt stack. Status: Accepted 2026-10-07 Verification: Test: Trace: SPEC-012 §4 |
The switch and launch sequences shall restore the incoming SREG and r0 before Rationale: The actual restore tail and pending IRQ entry must be validated together; the historical out/ret-only description did not match the assembly. Status: Accepted 2026-10-07 Verification: Test: Trace: SPEC-012 §4.2, §4.3 |
Rationale: SPEC-002 §6.2, §7.2 on this core. Status: Accepted 2026-10-07 Verification: Test: Trace: SPEC-012 §4.4, §5 |
The default tick shall be an exact 1 ms Timer1 CTC interrupt (prescaler 64, Rationale: SPEC-003 §13; KRN-TIM-036. Status: Accepted 2026-10-07 Verification: HIL test: tick exactness over one minute against the host clock; Trace: SPEC-012 §7 |
The tiny reference configuration on this port shall fit the T1 and T2 targets: kernel text at most 4 KB at Rationale: R-003 §4. Status: Accepted 2026-10-07 Verification: Footprint test in CI on both compilers. Trace: SPEC-012 §8, §13 |
Kernel tables shall use Rationale: 09 §2 ( Status: Accepted 2026-10-07 Verification: Footprint comparison EmbCC versus avr-gcc; generator test for both outputs. Trace: SPEC-012 §8 |
Checked builds on this port shall enable the switch-out stack guard check, the interrupt-reserve check, and the software watchdog service; a kernel fault shall write the small crash record to Rationale: No fault hardware; the watchdog and the guards are the only safety nets. Status: Accepted 2026-10-07 Verification: Test: Trace: SPEC-012 §8, §9; FLT-001, FLT-004 |
Symbolic debugging shall use the qualified avr-gcc reference build until the EmbCC RTOS debugging path is qualified; the EmbCC build shall be verified by the conformance suite under QEMU and on the Rationale: EmbCC’s AVR DWARF and remote layout are now implemented (09 §7/§9, reviewed 2026-10-14), but tool capability does not replace RTOS target/session qualification (SIM-002, SIM-003). The original acceptance date below is design status, not evidence that those runs passed. Status: Accepted 2026-10-07 Verification: CI: QEMU AVR run of the conformance suite on both compilers; HIL run on the Uno. Trace: SPEC-012 §10, §12 |
Rationale: A new board on this SoC is a description file (01 §6). Status: Accepted 2026-10-07 Verification: Generator test; boot test on the board. Trace: SPEC-012 §11 |