EmbLinkRTOS Architecture, v0.2

This directory is the architecture baseline for EmbLinkRTOS. It supersedes the v0.1 PDF specification where it disagrees and otherwise builds on it.

Reading order

#

Document

What it answers

00

Review of v0.1

What v0.1 got right, what was missing, what v0.2 changes and why

01

Vision and principles

Mission, what “modern” means here, principles, non-goals, positioning, definition of success

02

System architecture

Layers, responsibilities, concept vocabulary, dependency rules, execution contexts, profiles, native port, how a board arrives

03

Kernel architecture

Execution model, scheduling classes and budgets, wait protocol, time, synchronization, IPC, objects and capabilities, partitions, memory, faults

04

Platform architecture

Hardware description pipeline, device and driver model, power, boot and update, security, observability, multicore, simulation, middleware

05

Engineering system

API conventions, configuration and build, repository layout, verification, quality gates, traceability, release, support, documentation

06

Decision records

ADR-001 to ADR-040 with alternatives and consequences; ADR-004, ADR-024, ADR-025, ADR-026 to ADR-038 and the ADR-039 revision and ADR-040 tooling decision are accepted; older records retain their recorded statuses and subsequent specification refinements

07

Roadmap

1.0 boundary, milestones M0 to M6+, specification work order, risks

08

Open questions

Decisions awaiting the project owner, each with a recommendation

09

EmbCC toolchain profile

Verified EmbCC capabilities and limits per target, and the kernel rules that follow from them

Status markers

  • LOCKED - established in v0.1 or confirmed here; changed only through a new ADR.

  • PROPOSED - new in v0.2; recommended, becomes LOCKED on review.

  • PLANNED - required capability; detailed design still to be written.

  • FUTURE - must not be precluded; not in 1.0.

Requirement identifiers

v0.1 groups continue their numbering (for example KRN-SCH-036 follows v0.1’s KRN-SCH-035). New groups introduced in v0.2:

KRN-MM    memory ordering          KRN-TP    temporal protection
KRN-WAIT  wait and wake protocol   KRN-NOTIF notifications
KRN-WQ    work queues              KRN-CAP   capabilities
KRN-OBJ   object lifecycle         KRN-PART  partitions
FLT  faults      HW   hardware description   DRV  drivers      PWR  power
BOOT boot/update SEC  security (continues)   OBS  observability MC  multicore
SIM  simulation  API  API conventions        BLD  build        TEST verification (continues)
REL  release     SUP  support levels

Requirements move into docs/requirements/ as structured files group by group, as each specification work item lands; the format guide and group index are in docs/requirements/README.md, and the first migrated group is API. Detailed designs live in docs/specs/. The architecture documents cite requirements rather than restate them once a group has moved.

Phase

M1 kernel execution is implemented; M2 remains incomplete. Native, AVR, Cortex-M3/M4F, and RV32IMAC ports exist, with embedded conformance configured under QEMU. Hardware latency, isolation, budgets, the hardware generator, and complete observability remain outstanding. Read Project status for the authoritative implementation and evidence inventory and the roadmap for delivery gates.